thank god all the stuffs are given in the datasheet...
Words in bold are SFR... those which are not, are flags inside the SFR.... with the datasheet, there is virtually nothing that we cannot do =D no careless please... >< hahahahahaha
Some Theory from Tutorial:
Machine language – binary code, directly understood by the CPU.
Assembly language – mnemonic representation of the binary code, a one-to-one direct translation (assemble) to the binary code.
High-level language – more human-readable instruction and easy-to-understand programming concept (if-then-else, and loops), one instruction normally translates (compiles) to multiple binary instructions.
Address bus – to send (from CPU) the address of the memory requested to the memory module, unidirectional.
Data bus – to send or receive binary data, bidirectional.
Data RAM – volatile, instant rewrite, store data.
EEPROM – non-volatile, slow in rewriting, store data/program.
Flash – non-volatile, reasonably fast in rewriting, store program.
7. What does a register in the PIC18 made of?
Answer: 8 flip-flops (or an 8-bit SRAM).
8. State the addresses and describe the roles of WREG, STATUS, and PC.
WREG (FE8h) – store ALU (CPU) output result.
STATUS (FD8h) – store special condition flags of the ALU operation.
PC (FF9h, FFAh, FFBh) – store the address of the next instruction to execute.
TIMER
Timer0 (16bit)
Controlled by T0CON
set PSA, TOPS2, TOPS1, TOPS0 to set the prescale (PSA set=bypass prescale)
*New instruction cycle time = Prescale X 4/Fosc
- set TMR0ON to start timer
*always stop the timer when needed then start back again !!!!
*set TMR0H first then cai set TMR0L
timer interrupt is in INTCON de TMR0IF
Timer1 (16bit)
*by default when cleared the flags, pre scale = 0
T1CON's flag is different from T0CON *check datasheet
there is no bypass prescale flag
overflow flag is in PIR1 de TMR1IF
Timer2 (8bit)
*by default when cleared the flags, pre/post scale = 0
interrupt flag is in PIR1 de TMR2IF
need to set PR2 (maximum number before overflow) 00 >> PR2 then overflow ~~
Timer3 (16bit)
*by default when cleared the flags, pre scale = 0
interrupt flag is in PIR2 de TMR3IF
Serial Communication Interface, SCI
DB-9 connector
pins which are shorted in groups:
1 - let PC know modem is ready
4 - PC turn on
6 - modem ready
7 - PC output signal / when PC want to send data
8 - modem ready to receive data
TXSTA (status and control bits for transmission)
TXEN - transmit enable bit
RCREG - receive register/read data
TXREG - transmitter, wrtite 1 byte, send 1 byte (byte by byte)
SPBRG - tune Baud rate
*done by movine decimal literal into this FSR
Baud rate(bit/sec) = Fosc/(64 x (SPBRG+1))
RCSTA (master control of UART)
SPEN - master power on
CREN - continuous receive
PIR1
RCIF - set when there is smtg to send
clear when RCREG is empty
TXIF - set when TXREG is empty
clear when TXREG is full
INTERRUPT
INTCON : enable GIR(must enable) or PEIE(for PORTB0,1,2)
INTCON3 : INT(0/1/2)IE (enable bit, to enable PORTB0,1 or 2 as interrupt pin) INT(0/1/2)IF as interrupt flag
INTCON2 : INTEDG(0/1/2) depending on which PORTB used, detect fallin(clear) or rising(set) edge as interrupt
remember to check the interrupt flag when an interrupt is detected and use RETFIE (return + set GIE)
SCI Interrupt saya tak tahu =( hope wun come out tomorrow?
used for receiving data
flags to set:
RCIE in PIE1 (enable receive interrupt)
RCIF in PIR1 is the interrupt flag to check
*08h and 18h are reserved for interrupts =D
OUTCOME :
BEST paper EVER !!! for the first time I left whole section blank.... I have no idea how to draw schematic with pen and paper... what a waste of time...
a stupid mistake made... SUBLW is L-W and not vice versa... what ever... I have no faith with digital stuff anyways... not that I do not know... but I have no idea why do I always get low marks during exams... -_-
maybe this is a wake up call? screw all those exams... who the heck cares what your gpa or cgpa is... as long as you know you are doing, that's enough =D
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